1. Field of the Invention
The present invention relates to a method of fabricating a metal-insulator-metal (MIM) capacitor and an MIM capacitor fabricated by the method, and more particularly, to a method of fabricating a concave-shaped MIM capacitor and an MIM capacitor fabricated by the method.
2. Description of the Related Art
Various kinds of capacitors such as metal-oxide-semiconductor (MOS) capacitors, PN junction capacitors, polysilicon-insulator-polysilicon (PIP) capacitors, and metal-insulator-metal (MIM) capacitors are used in semiconductor devices. In particular, since a metal is used as an upper electrode and/or a lower electrode of the MIM capacitor instead of a monocrystalline silicon layer or a polycrystalline silicon layer, the MIM capacitor offers reduced electrode resistance.
Accordingly, the MIM capacitor is mainly used in integrated circuits that operate at high-speed. Further, since the capacitance of the MIM capacitor is largely unaffected by variations in voltage and temperature, the MIM capacitor can be used in analog integrated circuits.
As the chip size of a semiconductor device continues to be reduced, it is difficult to obtain the required capacitance for operability of the semiconductor device. To increase the capacitance, several approaches, such as using a dielectric layer material with a high dielectric constant, reducing the thickness of the dielectric layer, and increasing the effective area of the lower electrode, have been employed. In particular, various methods have been developed in order to increase the effective area of the lower electrode. In the various approaches, the lower electrode has been formed in a cylindrical shape, a concave shape, a stacked shape, and so forth. Alternatively, a hemispherical grain (HSG) can be grown on the lower electrode to increase the effective area.
A conventional method of fabricating a concave-shaped MIM capacitor is described below. First, a lower electrode conductive layer is formed on an insulating-layer pattern formed on a semiconductor substrate and having a plurality of openings. Thereafter, a filling material for filling the openings, for example, a photoresist layer or Flowable OXide (FOX) layer, is coated on an upper part of the lower electrode conductive layer and a plurality of lower electrodes (cells) that are separated from each other are then formed through a chemical mechanical polishing (CMP) process or an etch-back process. Here, the lower electrode is referred to as a lower electrode of a plurality of unit capacitors (hereinafter, referred to as an MIM capacitor cell) constituting a single MIM capacitor.
In particular, the predetermined filling material must have an excellent gap filling characteristic to fully fill the openings on the lower electrode conductive layer. Further, the filling material must be hard enough to resist the laterally directed force applied during the CMP process. When the filling material is removed, the filling material must have such an etch selectivity that the lower electrodes are not removed. However, when the plurality of lower electrodes separated from each other are formed in the conventional MIM capacitor, the height of the lower electrode located in the center of the capacitor can be lower than the height of the lower electrode located at the edge of the capacitor. Accordingly, uniformity in the capacitance between the MIM capacitor cells can deteriorate.